Issues

• Add functionality to restart the simulators

  UCSBarchlab/PyRTL#514 · Filter by author timsherwood opened on Sep 22, 2026
  6

• False-Positive Type Errors in Register

  UCSBarchlab/PyRTL#511 · Filter by author PigBrainOverflow opened on Aug 6, 2026
  7

• Active Low Reset options in output_to_verilog

  UCSBarchlab/PyRTL#487 · Filter by author timsherwood opened on Jun 15, 2026

• Refactor Jupyter Notebook support

  UCSBarchlab/PyRTL#485 · Filter by author fdxmw opened on Jun 11, 2026

• Improve block visualization

  UCSBarchlab/PyRTL#451 · Filter by author fdxmw opened on Jun 1, 2024

• Improve handling of signed numbers

  UCSBarchlab/PyRTL#450 · Filter by author fdxmw opened on Jun 1, 2024
  3

• Add bitmasked write to memories

  UCSBarchlab/PyRTL#418 · Filter by author timsherwood opened on May 21, 2022
  1

• fixed point

  enhancement
  UCSBarchlab/PyRTL#417 · Filter by author timsherwood opened on May 20, 2022
  1

• Add unit tests for different types of possible flip-flops importable as BLIF

  UCSBarchlab/PyRTL#414 · Filter by author mdko opened on Feb 12, 2022
  1

• Find better way to handle special WireVector subclasses like _MemIndexed

  confusing or uncaught error
  UCSBarchlab/PyRTL#406 · Filter by author mdko opened on Sep 23, 2021

• Implement wrap_around in the barrel_shifter

  fix before version 1.0
  UCSBarchlab/PyRTL#355 · Filter by author mdko opened on May 4, 2021

• Improve CompiledSimulation Iteration over Memory

  enhancement
  UCSBarchlab/PyRTL#320 · Filter by author mdko opened on Feb 24, 2021
  

• Make FastSimulation faster by combining it with Simulation

  UCSBarchlab/PyRTL#265 · Filter by author drholmie opened on Aug 29, 2019

• Using output as a source (rather than a dest) throw internal error instead of user error

  beginner friendlyconfusing or uncaught error
  UCSBarchlab/PyRTL#263 · Filter by author timsherwood opened on Jul 2, 2019

• ipynb examples - Example #4: use set_debug_mode() to provide more information

  UCSBarchlab/PyRTL#245 · Filter by author kmahorker opened on Oct 15, 2018

• Controlling hardware simulation: Python test benches?

  UCSBarchlab/PyRTL#226 · Filter by author abe-k opened on Dec 19, 2016
  11

• Synchronous Reset for FPGA

  enhancement
  UCSBarchlab/PyRTL#162 · Filter by author jemcmahan13 opened on Jun 30, 2016
  1