ARM: fullhan: add FH8626V100 platform support

arch/arm/mach-fh/Kconfig

@@ -68,6 +68,19 @@ endif
 
 choice
 prompt "Board"
+config ARCH_FH8626V100
+	bool "Fullhan FH8626V100"
+	depends on !USE_OF
+	select CPU_V6
+	select FULLHAN_INTC
+	select FULLHAN_TIMER
+	help
+	  Enable support for the Fullhan FH8626V100 SoC. The target uses an
+	  ARMv6 CPU with the Fullhan interrupt controller and timer. This
+	  option provides the SoC-level facilities required by the legacy
+	  non-device-tree platform code; board devices are registered by the
+	  matching machine configuration.
+
 config ARCH_FH885xV200
         bool "Fullhan FH885xV200"
         select CPU_V6
@@ -81,13 +94,49 @@ endchoice
 config FH_CHIP_NAME
         string
         prompt "Select chip name, keep default"
+        default "fh8626v100" if MACH_FH8626V100
         default "fh8856v200" if MACH_FH8856V200
         default "fh8852v200" if MACH_FH8852V200
         default "fh8858v200" if MACH_FH8858V200
         default "fh8856v210" if MACH_FH8856V210
         default "fh8852v210" if MACH_FH8852V210
         default "fh8858v210" if MACH_FH8858V210
 
+config MACH_FH8626V100
+	bool "FullHan FH8626V100 board"
+	default y
+	depends on ARCH_FH8626V100
+	help
+	  Enable the legacy non-device-tree machine description for
+	  FH8626V100 boards. It preserves the stock U-Boot ATAG handoff and
+	  the verified early MMIO mappings while the native OpenIPC kernel is
+	  brought up incrementally. Device support is added only after the
+	  corresponding FH8626V100 hardware contract is verified.
+
+config FH8626V100_ONCHIP_RTC
+	bool "Enable the FH8626V100 on-chip RTC"
+	default y
+	depends on MACH_FH8626V100 && RTC_DRV_FH
+	help
+	  Register the FH8626V100 on-chip RTC platform device. Individual board
+	  profiles may disable it when the required clock/backup hardware is not
+	  available or has not been validated on that board. The Fullhan TSENSOR
+	  is accessed through the same RTC core command channel rather than a
+	  direct temperature MMIO register, so enabling this option is also a
+	  prerequisite for the legacy TSENSOR path but does not prove that either
+	  function works on a particular board.
+
+config FH8626V100_AJL33PQ0866_MMC
+	bool "Enable AJL33PQ0866 one-bit SD0 slot"
+	default n
+	depends on MACH_FH8626V100 && MMC_FH
+	help
+	  Register only the SD0 controller wired to the microSD slot on the
+	  ANJIA AJL33PQ0866 and select its exact stock SD0_1BIT_NO_WP pinmux.
+	  The one-bit profile leaves pad66 available as the active-low GPIO61
+	  reset button. Other FH8626V100 boards must select their own controller
+	  registration and pinmux policy.
+
 config MACH_FH8856V200
     bool "FullHan FH8856V200 board"
     default n

arch/arm/mach-fh/Makefile

@@ -1,10 +1,15 @@
 CONFIG_FH_CHIP_NAME 	:= $(subst ",,$(CONFIG_FH_CHIP_NAME))
 EXTRA_CFLAGS      	+= -Iarch/arm/mach-fh/$(CONFIG_FH_CHIP_NAME)
 
-obj-y	+= pmu.o fullhan.o fh_common.o fh_chipid.o
+obj-y	+= fullhan.o fh_common.o fh_chipid.o
+
+ifneq ($(CONFIG_MACH_FH8626V100),y)
+obj-y	+= pmu.o
+endif
 
 ifneq ($(CONFIG_USE_OF),y)
-obj-y 			+= pinctrl.o clock.o
+obj-y 			+= clock.o
+obj-y 			+= pinctrl.o
 obj-y += $(CONFIG_FH_CHIP_NAME)/
 endif
 

arch/arm/mach-fh/clock.c

@@ -235,60 +235,53 @@ int fh_pll_pr_clk_register(struct fh_clk *fh_clk)
 
 }
 
-static int fh_clk_set_phase(struct clk_hw *hw,
-						int degree)
+static int fh_clk_set_phase(struct clk_hw *hw, int degree)
 {
-	u32 reg;
 	struct fh_clk_phase *phase = (struct fh_clk_phase *)hw;
 	unsigned long flags = 0;
-	u32 local_degree = 0;
-	u32 shift = 0;
-
-    /*printk("fh_clk_set_phase:%d\n",degree);*/
-	if (phase->lock)
-		spin_lock_irqsave(phase->lock, flags);
+	u32 reg;
+	u32 shift;
 
-		/* Fetch the register value */
-		reg = fh_pmu_get_reg(phase->reg);
+	if (!phase->mux)
+		return -EINVAL;
 
-		local_degree = degree;
+	shift = ffs(phase->mux) - 1;
 
-		shift = ffs(phase->mux)-1;
+	if (phase->lock)
+		spin_lock_irqsave(phase->lock, flags);
 
-		reg |= (local_degree << shift);
+	reg = fh_pmu_get_reg(phase->reg);
+	reg &= ~phase->mux;
+	reg |= ((u32)degree << shift) & phase->mux;
+	fh_pmu_set_reg(phase->reg, reg);
 
-		/* Apply them now */
-		fh_pmu_set_reg(phase->reg, reg);
 	if (phase->lock)
 		spin_unlock_irqrestore(phase->lock, flags);
 
-	return 1;
+	return 0;
 }
 
 static int fh_clk_get_phase(struct clk_hw *hw)
 {
-	u32 reg;
 	struct fh_clk_phase *phase = (struct fh_clk_phase *)hw;
 	unsigned long flags = 0;
-	u32 local_degree = 0;
+	u32 reg;
 	u32 shift;
 
-	if (phase->lock)
-		spin_lock_irqsave(phase->lock, flags);
+	if (!phase->mux)
+		return -EINVAL;
 
-		/* Fetch the register value */
-		reg = fh_pmu_get_reg(phase->reg);
-		shift = ffs(phase->mux)-1;
+	shift = ffs(phase->mux) - 1;
 
-		reg = reg&(phase->mux) >> shift;
-		local_degree = reg;
+	if (phase->lock)
+		spin_lock_irqsave(phase->lock, flags);
 
-	 /*printk("fh_clk_get_phase:%d\n",local_degree);*/
+	reg = fh_pmu_get_reg(phase->reg);
 
 	if (phase->lock)
 		spin_unlock_irqrestore(phase->lock, flags);
 
-	return local_degree;
+	return (reg & phase->mux) >> shift;
 }
 
 

arch/arm/mach-fh/fh8626v100/Makefile

@@ -0,0 +1 @@
+obj-y += board.o chip.o pmu.o