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The link sequences of the T6050 fixed DP PHY, taken unchanged from aurora-silicon#248 ("phy: apple: Add T6050 fixed DP and four-clock crossbar support", 440f79f) as the single file the T6040 Type-C PHY needs for its DisplayPort mode: the T6050 ADT names its PHY "atc-phy,t6050", "atc-phy,t6040", and the sequences run unchanged on the T6040 PHY core. Only the data header is carried here; the T6050 PHY driver, its binding and the crossbar changes of aurora-silicon#248 stay in that pull request. Once aurora-silicon#248 lands, this commit disappears on rebase. [fbalazsy: picked drivers/phy/apple/atc-t6050-dp-data.h alone from aurora-silicon#248]
…ed DP PHY
The T6040 Type-C PHY also carries DisplayPort: the PHY of a USB-C port as
the alt mode switch of its connector (mode-switch), and the PHY of an HDMI
converter as a fixed DisplayPort link. The fixed instance has no USB
controller behind it, so no PIPE interface ("pipehandler" region), no reset
line and no connector port. Describe the DP phy type, the mode switch and
the ten-region variant, and require #reset-cells only where the PIPE
interface exists.
Add PHY_TYPE_DP to the T6040 Type-C PHY: PHY mode 3 of the paired
AppleT6040TypeCPhy driver, DisplayPort on all four lanes, for a Type-C port
whose controller selected DP alt mode with pin assignment C or E, and for
the fixed DP PHY of an HDMI converter, a node without the PIPE interface
and the DWC3 reset line, which now probes too.
Bring-up follows the paired driver's mode 3: wake the CFG block, apply the
generic ADT tunables and the DPTX tunables, set the lane crossbar to DP,
hold the common block and both TX lanes on by override (the PHY
coprocessor does not run in this mode), release the reset, then set the
lane mode and the AUX block. On a Type-C port the USB3 side is shut down
first. The per-rate link sequences (RBR to HBR3) and the drive-setting
presets are the T6050 fixed-DP tables, whose PHY the T6050 ADT marks as
T6040-compatible ("atc-phy,t6050", "atc-phy,t6040"); the T6050 clock shim
steps are replaced by the T6040 DP clock switch of the CFG window, run
after the lane program as the paired driver does. Pin assignment D (two DP
lanes next to USB3) is not supported.
The Type-C mode switch latches whether the port is in DP alt mode;
apple_t6040_phy_dp_alt() (include/linux/soc/apple/dp-tunnel.h) exposes it
for a DCP that lists several Type-C DP PHYs and routes to the one with a
sink plugged.
Author
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Folded unchanged into #445 together with the drm side that uses it; closing this one. |
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The T6040 Type-C PHY (
apple,t6040-atcphy) also carries DisplayPort: the PHY of a USB-C port when its Type-C controller selects DP alt mode with pin assignment C or E, and the PHY of the HDMI converter (ATC3 on the J616s) as a fixed DP link. This addsPHY_TYPE_DPto the driver, as PHY mode 3 of the paired AppleT6040TypeCPhy: DP on all four lanes.Change. Three commits:
phy: apple: T6050 fixed DisplayPort PHY register sequences—drivers/phy/apple/atc-t6050-dp-data.hunchanged from phy: apple: Add T6050 fixed DP and four-clock crossbar support #248 (440f79f, author kept). The T6050 ADT names its PHY"atc-phy,t6050", "atc-phy,t6040"and the link sequences run unchanged on the T6040 PHY core. Only this header is carried; phy: apple: Add T6050 fixed DP and four-clock crossbar support #248 itself no longer applies tointegration/aurora(crossbar and config conflicts), so this PR carries the one file it needs. The commit disappears on rebase once phy: apple: Add T6050 fixed DP and four-clock crossbar support #248 lands.dt-bindings: phy: apple,t6040-atcphy: DisplayPort mode switch and fixed DP PHY—mode-switch, thePHY_TYPE_DPcell, and the ten-region variant withoutpipehandler(the fixed DP PHY has no USB controller:#reset-cells,orientation-switch,mode-switchandportare refused there). Second example.phy: apple: t6040: DisplayPort mode— mode-3 bring-up (CFG wake, generic ADT tunables + DPTX tunables, lane crossbar to DP, common block and both TX lanes held on by override since the PHY coprocessor does not run in this mode, reset release, lane mode, AUX block; on a Type-C port the USB3 side is shut down first), the T6050 per-rate link sequences (RBR–HBR3) and drive presets followed by the T6040 DP clock switch in the CFG window, the Type-C mode switch latching DP alt mode,apple_t6040_phy_dp_alt()ininclude/linux/soc/apple/dp-tunnel.hfor a DCP that lists several Type-C DP PHYs and routes to the plugged one. A node withoutpipehandlernow probes (fixed DP PHY). Pin assignment D (two DP lanes next to USB3) is not supported.The J616s device-tree nodes (atcphy3,
mode-switchon atcphy0–2, dcpext0/1 and the DISPEXT power chains) and the appledrm side follow separately; see #435 (crossbar) and #436 (pmdomain) for the other pieces already up.Hardware tested on: MacBook Pro 16" M4 Pro (J616s, T6040/T6041), DCP firmware 26.6.2, local kernel 7.3.0-m4.74 =
integration/aurora420a1c8 + the J616s display series with exactly these PHY commits (the daily kernel this Mac runs on).How tested:
hyprctl monitorsUSB-1), dcpext1 up, no DP clock-switch or link errors, 28 PHY log lines at boot (m4.72: 124)drivers/phy/apple/t6040-usb2.oonintegration/aurora420a1c8dp_init/aux_on/aux_off/dp_poweroff, are reported unused)checkpatch.pl --stricton the two patchesmake dt_binding_check DT_SCHEMA_FILES=…/apple,t6040-atcphy.yaml(dtschema 2026.9, yamllint)