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Merge train: J713 Touch ID (#457) rebased onto integration/aurora - #988

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RyanTheTide merged 5 commits into
integration/aurorafrom
merge-train/pr457-j713-touchid
Nov 5, 2026
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RyanTheTide merged 5 commits into
integration/aurorafrom
merge-train/pr457-j713-touchid

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Carries erikwb's #457 (J713 Touch ID: SEP profile for the V3 sensor, the T8132 SEP/mailbox/DART/SPI2 nodes and the J713 board enable) unchanged, plus one merge commit that resolves its conflict with integration/aurora. Merging this also merges #457, with erikwb's commits and authorship intact.

The only conflict was drivers/soc/apple/profile.rs: integration/aurora gained the T6041 (J616c) profile and the J614s in the T6040 selection, while #457 added the T8132 profile and moved selection into a pure select(). The merge keeps both profiles and selects through has() in the order T6040 (J616s, J614s), T6041 (J616c), T8132 (J713). It also adds the J614s/J616c cases to the selection test and T6041 to the DART window test.

J713 hardware evidence is erikwb's (enrol, match and restore after reboot on 26.6.2, per #457). We don't have a J713, so on our side this gets the usual gates plus regression boots on the M1 Pro, M2, J700 and J616s, checking that every existing board still picks its own profile.

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erikwb and others added 5 commits October 30, 2026 16:15
The M4's SPI controllers are the T8103 design, as on T8140.

Signed-off-by: Erik Bourget <erik@ebourget.net>
The Secure Enclave and its DART, as the ADT describes them: SEP at
0x3aa600000 with its ASC mailbox at +0x8000 (AIC 389-392), DART at
0x3a8c80000 (AIC 399) with the BIT(40) input alias the DART translates.
The DART's register window is 0x20000: its stale-exception drain reads
per-stream registers past 0x4000.

SPI2 at 0x3ad108000 (AIC 1056) carries the Mesa fingerprint sensor. As on
T8140 it runs from the 24 MHz reference clock; with a 200 MHz rate the
divider for the sensor's 8 MHz gave about 1 MHz and frame reads timed out.
The sensor node takes SPI mode 2, as the 0x3356 sensor does on J700.

All disabled. The SEP driver enables the SEP and its DART itself; a
board with a qualified sensor enables the mailbox and SPI2.

Signed-off-by: Erik Bourget <erik@ebourget.net>
The J713 SoC side is J613's: a warm-attach enclave shared with macOS,
the variant-5 key store and the BIT(40) DART alias. Its Mesa sensor is
J700's generation (0x3356, "V3" in the ADT), not J613's (0x3352): the
enclave refuses the R3 session (SESSION_SHARE status 0x16), and its
factory calibration is an FSC2 image. So it takes J700's SPI mode 2
and nonce session. Its device tree names its own signed root key.

Profile selection becomes a pure function of the root compatible list,
so the tests can check that only J713 selects T8132 and that the other
boards keep their profiles.

J713 on 26.6.2 (25G83) provisions its keybag, enrols, matches, and
restores the enrolment after a reboot, with xart_guard 1 and no record
refused.

Signed-off-by: Erik Bourget <erik@ebourget.net>
Enable the SEP mailbox and the Mesa sensor, which sits on spi2 with power
on NUB GPIO 28 and data-ready on AP GPIO 199 (J713 ADT /arm-io/spi2/mesa).
The SEP driver enables the SEP and its DART itself.

The sensor node names this Mac's calibration and its signed root key.

Signed-off-by: Erik Bourget <erik@ebourget.net>
Resolve drivers/soc/apple/profile.rs: integration/aurora added the T6041
(J616c) profile and extended the T6040 selection to the J614s, while this
branch added the T8132 (J713) profile and moved selection into a pure
select(). Keep both profiles, select through has() in the order
T6040 (J616s, J614s), T6041 (J616c), T8132 (J713), and cover the J614s
and J616c branches in the selection test and T6041 in the DART window
test.

Assisted-by: LLM
Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
@RyanTheTide

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Merge train (MTL, 06/11). Gates passed on test tree 0412501d (integration/aurora 2661d71 + this batch):

  • Signed-off-by from the author on every commit. Adversarial review done.
  • W=1 on the touched objects: 0 new warnings. KUnit: drm/apple 112/113 (1 skip), hid 19/19, SEP 158/163 (the 4 known apple_sep_host_store failures, profile tests all pass). dt_binding_check clean. apple-dcp host selftests 86/86, run-host-tests at base parity (with Merge train: G17 hang confinement (#928) plus its host-test fixture #989's fixture).
  • Regression boots of 7.3.0-aurora-mtl1106a, compared with the fleet16/fleet17 rows: M2, M1 Pro, J700 and J616s all clean (0 err-level lines, 0 AVCs, displays, Wi-Fi, BT, Touch ID, camera, speakers at minimal volume with speakerguardd, s2idle, perf at parity).
  • Carries J713: Touch ID (SEP profile for the V3 sensor, SoC and board device tree) #457 with the profile.rs resolution. J713 evidence is erikwb's; every board we have still picks its own SEP profile.

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