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13 changes: 13 additions & 0 deletions alioth-cli/src/boot/boot.rs
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,8 @@ use std::collections::HashMap;
use std::mem;
use std::path::{Path, PathBuf};

#[cfg(target_arch = "aarch64")]
use alioth::board::PlatformSpec;
use alioth::board::{BoardSpec, CpuSpec};
use alioth::device::console::ConsoleSpec;
#[cfg(target_arch = "x86_64")]
Expand Down Expand Up @@ -122,6 +124,12 @@ pub struct BootArgs {
#[arg(long)]
pvpanic: bool,

#[cfg(target_arch = "aarch64")]
#[arg(long, help(
help_text::<PlatformSpec>("Configure the platform of the guest.")
))]
platform: Option<Box<str>>,

#[cfg(target_arch = "x86_64")]
#[arg(long, help(
help_text::<FwCfgItemSpec>("Add an extra item to the fw_cfg device.")
Expand Down Expand Up @@ -294,6 +302,11 @@ fn parse_args(mut args: BootArgs, objects: HashMap<&str, &str>) -> Result<VmSpec
};
board_spec.mem = parse_mem_arg(args.memory, args.mem_size, &objects)?;
board_spec.cpu = parse_cpu_arg(args.cpu, args.num_cpu, &objects)?;
#[cfg(target_arch = "aarch64")]
if let Some(arg) = args.platform {
board_spec.platform =
serde_aco::from_args(&arg, &objects).context(error::ParseArg { arg })?;
}

let mut spec = VmSpec {
board: board_spec,
Expand Down
8 changes: 7 additions & 1 deletion alioth-cli/src/boot/boot_test.rs
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@
use std::collections::HashMap;
use std::path::Path;

use alioth::board::{BoardSpec, CpuSpec, CpuTopology};
use alioth::board::{BoardSpec, CpuSpec, CpuTopology, PlatformSpec};
#[cfg(target_arch = "x86_64")]
use alioth::device::fw_cfg::{FwCfgContentSpec, FwCfgItemSpec};
use alioth::device::net::MacAddr;
Expand Down Expand Up @@ -55,6 +55,8 @@ fn test_parse_args() {
cpu: Some("count=16,topology=id_topo".into()),
memory: Some("size=128G,backend=anon,shared=true".into()),
pvpanic: true,
#[cfg(target_arch = "aarch64")]
platform: Some("acpi=true".into()),
#[cfg(target_arch = "x86_64")]
fw_cfg: vec![
"name=item1,file=file1".into(),
Expand Down Expand Up @@ -119,6 +121,10 @@ fn test_parse_args() {
transparent_hugepage: false,
},
coco: None,
platform: PlatformSpec {
#[cfg(target_arch = "aarch64")]
acpi: true,
},
},
payload: PayloadSpec {
executable: Some(Executable::Linux(Path::new("vmlinuz").into())),
Expand Down
8 changes: 7 additions & 1 deletion alioth/src/arch/aarch64/layout.rs
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,13 @@ pub const PCIE_CONFIG_START: u64 = 0x3000_0000; // 768 MiB
pub const RAM_32_START: u64 = 0x4000_0000; // 1 GiB

pub const DEVICE_TREE_START: u64 = 0x4000_0000; // 1 GiB
pub const DEVICE_TREE_LIMIT: u64 = 0x20_0000; // 2 MiB
pub const DEVICE_TREE_LIMIT: u64 = 0x10_0000; // 1 MiB

pub const ACPI_START: u64 = 0x4010_0000; // 1 GiB + 1 MiB
pub const ACPI_LIMIT: u64 = 0x8_0000; // 512 KiB

pub const UEFI_START: u64 = 0x4018_0000; // 1 GiB + 1.5 MiB
pub const UEFI_LIMIT: u64 = 0x8_0000; // 512 KiB

pub const KERNEL_IMAGE_START: u64 = 0x4020_0000; // 1 GiB + 2 MiB

Expand Down
66 changes: 65 additions & 1 deletion alioth/src/board/board.rs
Original file line number Diff line number Diff line change
Expand Up @@ -13,13 +13,14 @@
// limitations under the License.

#[cfg(target_arch = "aarch64")]
#[path = "board_arm64.rs"]
#[path = "board_arm64/board_arm64.rs"]
mod aarch64;
#[cfg(target_arch = "x86_64")]
#[path = "board_amd64/board_amd64.rs"]
mod x86_64;

use std::ffi::CStr;
use std::mem::size_of;
use std::os::fd::BorrowedFd;
use std::sync::Arc;

Expand All @@ -30,6 +31,7 @@ use parking_lot::RwLock;
use serde::Deserialize;
use serde_aco::Help;
use snafu::Snafu;
use zerocopy::{IntoBytes, transmute};

#[cfg(target_arch = "x86_64")]
use crate::arch::cpuid::CpuidIn;
Expand All @@ -44,17 +46,36 @@ use crate::device::MmioDev;
#[cfg(target_arch = "x86_64")]
use crate::device::fw_cfg::FwCfg;
use crate::errors::{DebugTrace, trace_error};
use crate::firmware::acpi::bindings::{
AcpiMcfgAllocation, AcpiSignature, AcpiTableHeader, AcpiTableMcfg1, AcpiTableRsdp,
MCFG_REVISION, RSDP_REVISION, SIG_RSDP,
};
use crate::hv::{CocoSpec, Hypervisor, MemMapOption, Vm, VmSpec};
use crate::loader::PayloadSpec;
use crate::mem::mapped::ArcMemPages;
use crate::mem::{self, LayoutChanged, MemBackend, MemRegion, MemRegionType, MemSpec, Memory};
use crate::pci::bus::PciBus;
use crate::utils::wrapping_sum;

#[cfg(target_arch = "aarch64")]
use self::aarch64::ArchBoard;
#[cfg(target_arch = "x86_64")]
use self::x86_64::ArchBoard;

const OEM_ID: [u8; 6] = *b"ALIOTH";

pub(crate) fn default_acpi_header() -> AcpiTableHeader {
AcpiTableHeader {
checksum: 0,
oem_id: OEM_ID,
oem_table_id: *b"ALIOTHVM",
oem_revision: 1,
asl_compiler_id: *b"ALTH",
asl_compiler_revision: 1,
..Default::default()
}
}

#[trace_error]
#[derive(Snafu, DebugTrace)]
#[snafu(module, context(suffix(false)))]
Expand Down Expand Up @@ -143,11 +164,21 @@ impl CpuSpec {

pub const PCIE_MMIO_64_SIZE: u64 = 1 << 40;

#[derive(Debug, Default, PartialEq, Eq, Deserialize, Help)]
pub struct PlatformSpec {
/// Enable ACPI for the guest.
#[cfg(target_arch = "aarch64")]
#[serde(default)]
pub acpi: bool,
}

#[derive(Debug, Default, PartialEq, Eq, Deserialize)]
pub struct BoardSpec {
pub mem: MemSpec,
pub cpu: CpuSpec,
pub coco: Option<CocoSpec>,
#[serde(default)]
pub platform: PlatformSpec,
}

impl BoardSpec {
Expand Down Expand Up @@ -318,6 +349,39 @@ where
}
Ok(pages)
}

// https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/05_ACPI_Software_Programming_Model/ACPI_Software_Programming_Model.html#root-system-description-pointer-rsdp-structure
fn create_rsdp(&self, xsdt_addr: u64) -> AcpiTableRsdp {
AcpiTableRsdp {
signature: SIG_RSDP,
oem_id: OEM_ID,
revision: RSDP_REVISION,
length: size_of::<AcpiTableRsdp>() as u32,
xsdt_physical_address: transmute!(xsdt_addr),
..Default::default()
}
}

fn create_mcfg(&self) -> AcpiTableMcfg1 {
let mut mcfg = AcpiTableMcfg1 {
header: AcpiTableHeader {
signature: AcpiSignature::MCFG,
length: size_of::<AcpiTableMcfg1>() as u32,
revision: MCFG_REVISION,
..default_acpi_header()
},
reserved: [0; 8],
allocations: [AcpiMcfgAllocation {
address: transmute!(PCIE_CONFIG_START),
pci_segment: 0,
start_bus_number: 0,
end_bus_number: 0,
..Default::default()
}],
};
mcfg.header.checksum = 0u8.wrapping_sub(wrapping_sum(mcfg.as_bytes()));
mcfg
}
}

#[cfg(test)]
Expand Down
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