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feat(c5): configure 48MHz clock source - #3077

Merged
fpistm merged 1 commit into
stm32duino:mainfrom
fpistm:c5562_usb_clk
Sep 15, 2026
Merged

fpistm merged 1 commit into
stm32duino:mainfrom
fpistm:c5562_usb_clk

Commits

Commits on Sep 15, 2026