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arm64: dts: apple: expand J616s hardware and resource descriptions - #506
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The M4 Pro (T6040/T6041) SPI controllers are register compatible with T8103, like the T6020 and T8140 ones. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Sensors whose enclave session needs a signed root key (the J700 and J616s part, 0x3356) take it as per-device factory data, like the calibration. Let firmware-name carry it as an optional second entry so the board description names it. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
The signed root-key container is per-device data, but its name was fixed to J700's. Read it from the sensor node's second firmware-name entry and keep J700's name when the board gives only the calibration, so the J700 device tree and its installed file keep working unchanged. Name the file in the error when it cannot be loaded. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
The J616s ADT (26.6.2) describes a SEP that iBoot boots before the AP OS, an iop-sep,ascwrap-v6 whose DART window starts at the BIT(40) alias, and the Mesa sensor J700 carries (0x3356) on spi2 at 0x429108000, 8 MHz, chip select 0. So this is a warm-registration platform with T8140's authenticated sensor session, and the xART guard on from the first boot because macOS shares the enclave. Only J616s is matched; the other T6040 Macs' sensor wiring is unchecked. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
From the J616s ADT: the SEP at 0x406600000 with its mailbox at +0x8000 (AIC 666-669), its DART at 0x404c80000 (AIC 676) with the window iBoot programmed (vm-base 0x10000004000, vm-size 0x3ff00000), and spi2 at 0x429108000 (AIC 1569) with the Mesa sensor child. Add the sep, spi_p and spi2 power states from the ADT pmgr devices. The SEP and its DART stay disabled; apple_sep enables them when it loads. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Give the boot loader the sep alias it reserves the SEP firmware through, enable the SEP mailbox and spi2, and describe the sensor: NUB GPIO 53 powers it, AP GPIO 116 is its data-ready line, and its sealed calibration and root key come from this Mac's own iBoot system container. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Describe the power-state registers and their parent graph. Leave providers without a qualified Linux consumer disabled, since registering an unused domain may power down hardware still owned by firmware. Keep the existing tested providers unchanged. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Describe the separate ANE and AVE translation banks, PCIe port 1, SIO, external displays, scaler, APR and JPEG IOMMUs. Keep each disabled until its DMA consumer owns its power and streams. Shared DAPF and remap apertures are not independent IOMMU instances. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
…lers Add the AOP and SMC pin banks with the ADT pin counts and interrupt groups, and the four remaining NUB SPMI buses plus the AOP SPMI bus. Leave coprocessor-owned banks disabled until their ownership can be transferred. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Expose the Abbey PMICs at USID 14 on NUB SPMI buses 1 and 2 through the existing NVMEM binding. Enable their bus power states and shared parent. Use polled bus access as on NUB SPMI0 so firmware-owned peripheral interrupts remain untouched. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Describe the SIO DMA coprocessor and its mailbox, panel SPI controller and firmware NOR controller with their register, interrupt, clock and power resources. Extend the SIO and QSPIMC bindings for T6041. Keep them disabled pending firmware-table, panel-ownership and flash-write-policy qualification. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Describe both external display coprocessors and mailboxes, their PIODMA streams, all four display crossbars and the fixed HDMI PHY with its mailbox. Keep them disabled until the loader can supply a qualified live display handoff. Admit the existing T6041 external DCP driver compatible in the binding and require its bandwidth handoff when enabled. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Leave GPU reserved-memory reg properties absent until the loader supplies their addresses. The loader sets these properties rather than updating them in place. Give the DCP child address space an explicit identity mapping, as on the other Apple display descriptions. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Describe the engine, its interrupt and three DART translation banks. Extend the ANE binding for the single-interrupt T6041 firmware interface and leave the engine disabled until that interface has a Linux backend. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Describe the codec, mailbox and coprocessor windows, all five interrupts, the five hardware power states and both DART banks using the AVE binding. Keep it disabled until firmware support is available. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Describe port 1, its interrupt, reset and clock-request pins and its separate DART mapping. Leave the port disabled because its SMC power switch is not a hexadecimal gPxx GPIO and requires a separate service binding. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
…ariant Move the UART and DockChannel descriptions into the SoC tree, disabled by default, and provide a tether variant that enables its consoles while leaving the host-owned ATC0 port untouched. Give the normal board the PMP alias needed for its firmware handoff as well. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
…aints Enable the UART supply parent with the tether UART and omit USB reset-provider cells on the fixed DisplayPort PHY, as required by its binding. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Describe all three USB4 coprocessor mailboxes and their NHI translation banks with their interrupt and power resources. Keep them disabled until the host-router reset, SRAM and stream handoff is qualified. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Connect the three ATC common states, AVD, PMP and PMS SRAM to their ADT hardware parents. Enable the two missing fabric providers, both marked critical by the ADT, so active consumers never depend on disabled suppliers. Retain the existing additional PHY wrapper ordering dependencies. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
The T6041 firmware protocol has not been qualified against the legacy SIO backend. Describe its resources with a generation-specific compatible, so a loader cannot accidentally bind that backend by enabling the node. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Keep the existing host bus range while the SD port is disabled. Generic ECAM access does not filter unavailable OF ports, so describing that port must not expand downstream configuration probing before its power handoff is qualified. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
…tree Allow a machine card to describe speaker identity inputs with speaker-id-gpios, least significant bit first. Expose their logical levels in a read-only volatile Speaker Variant ID control. Cards without the property retain their existing controls. Describe the two J616s speaker variant inputs on AP GPIO 52 and 53. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Register the optional read-only identity control in late_probe, after the existing card and codec controls have been created. Their numeric identifiers remain stable when a board gains speaker-id-gpios. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
The J616s routes external display pipeline 0 through ATC3 to the HDMI bridge. Describe the fixed DP PHY, crossbar selection and reciprocal graph, and its active-high hotplug input on AOP GPIO 36, using the existing DCP properties. Permit the fixed DisplayPort PHY graph in the T6040 PHY binding, as well as the Type-C SuperSpeed graph. Leave both the external DCP and ATC3 disabled. The SMC bridge reset and power callbacks have a separate service contract, and the current firmware handoff still needs qualification before enabling the route. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
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The complete power-state table and the SEP series both describe SPI_P, SPI2 and SEP. Replaying their individual patches during a rebase leaves duplicate nodes whose later disabled status overrides the enabled suppliers required by the SPI2 fingerprint transport and SEP. Keep one definition of each physical power state and retain the enabled SEP-series definitions, as in the previously integrated tree. This also restores the active-provider invariant checked against the compiled DT. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
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Describe the five SIO-fed DPA interfaces and their power domains. Connect DPA0, DPA1 and DPA2 to their assigned DCP, DCPEXT0 and DCPEXT1 audio ports; DPA3 and DPA4 have no assigned display processor. Extend the existing DPA binding for T6041 and require unconnected interfaces to stay disabled. Keep all five interfaces disabled: the T6041 SIO firmware backend and compatible DCP audio services are not implemented. In particular, adding an audio graph must not pull an unavailable component into the active display pipeline or claim that HDMI audio works. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
This was referenced Oct 27, 2026
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Merged into aurora-wip through #534 (2026-10-28 consolidation). aurora-wip is the home for WIP from here on. |
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J616s omitted physical power states, DART banks, buses and coprocessor resources that are already represented on other Apple platforms. This series describes those resources, integrates the existing SEP/Touch ID support, adds a tracked tether DT and exposes the speaker variant GPIO inputs through the sound card.
The latest revision also describes the fixed ATC3 HDMI PHY/crossbar graph and HPD input, and permits that graph in the fixed-PHY binding. The external DCP remains disabled pending its firmware handoff, bridge power-service and GPIO IRQ ownership contracts. Unsupported generation interfaces retain their own compatible; older firmware/register contracts are not asserted as fallbacks. No new module parameter or feature flag is added.
Rebased on
9f52d7e79529, including merged sensor PR #507. The inherited SMC hwmon and thermal blocks are unchanged. The complete PMGR table is deduplicated against the SEP dependency so its enabled SPI2/SPI_P/SEP suppliers remain enabled.Validation at
467a513ce08b:Still draft: hardware qualification is pending. The remaining description gaps include USB4/PCIe-C, DP-IN/DP audio, SD/HDMI power services, unsupported accelerator/retimer/NFC interfaces and property semantics. Static disabled descriptions are not successful probes. The boot plan requires every added active provider to probe, disabled descriptors to retain their documented ownership/backend explanation, no new WARN/errors, and intact Wi-Fi, Bluetooth, GPU, display, camera, audio, input and power behavior.