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Preserve the nine Eryk follow-ups absent from the G15C fork, along with its four M3 Max commits. The shared ancestor already includes the current DJ agx3b stack. Generated-by: LLM
vkCmdBeginTransformFeedbackEXT and vkCmdEndTransformFeedbackEXT take pCounterBuffers as NULL or as an array of handles. With NULL, Begin starts every transform feedback buffer at byte offset zero. End writes nothing. The conformance test passes NULL with a count of 1 for this case. The driver read the first element of the NULL array and crashed. Skip the loop over the counter buffers when the array is NULL. Begin still zeroes the four offsets, and End still copies nothing. A call with an array, and an array with a null handle in it, behave as before. (cherry picked from commit b87e745) Generated-by: LLM
Assemble only the ordered-access and early depth-unbind protections whose code/data dependencies remain distinct from the renderpass store guard. Preserve DJ source and the original public source copyright notices. Ordered-access algorithm provenance: Mike Blumenkrantz, upstream b448ad053f2ce190a5b6b2d27b30dcbf3d45ec7d, public PR8 6ff2d4a (matching stable patch ID). Depth-unbind algorithm provenance: Eryk Wieliczko, public PR7 53a3630. Regression fixture provenance: Ryan Murray, fd3072f. This independently authored integration checkpoint retains their exact reviewed source changes rather than claiming new authorship of those algorithms. Original contributor commits are retained unchanged on the evidence branch and in the source bundle; the delivered topic is linear for root review, without merging any public branch. Signed-off-by: Ryan Murray <ryan@aurorasilicon.org> Assisted-by: LLM (cherry picked from commit 53a09d6) Generated-by: LLM
An index read followed by a transfer read can restore unordered_read while unordered_write remains true. Recorded ordered reads in the same batch must prevent a destination write from entering reordered_cmdbuf. Retain the public PR8 history tracking and combined barrier masks, PR7 depth protections, lifecycle resets and latest DJ storeOp guard unchanged. Reviewer1802 actual-source sequence supplies the regression control. Signed-off-by: Ryan Murray <ryan@aurorasilicon.org> Assisted-by: LLM (cherry picked from commit 02c37f3) Generated-by: LLM
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Adapt the range, result-address, shared-backend and cache-lifetime checks from Joshua Warren commits f91b6f4 and ddfb4cf. Preserve the newer independent mapping implementation instead of replacing it with an older BO-wide mapping. Co-authored-by: Joshua Warren <816217+joshuaswarren@users.noreply.github.com> Generated-by: LLM
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… tail The production payload is 136 bytes, matching the experimental kernel header. Keep the 64/72/80-byte SCS and prior-barrier offsets asserted and add 88/128-byte assertions for the appended state. Generated-by: LLM
The RT test read len in the same argument list as the encoder changed it, which is unsequenced in C and failed under GCC. Read the length through a pointer inside the expectation after encoding; preserve all 611 checks and pinned bytes. Forward mmap addresses through drm-shim so MAP_FIXED tests exercise the requested address rather than trying to map address zero. Include Meson test dependencies when selecting host build targets. Generated-by: LLM
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…dback buffer Generated-by: LLM
…t probes Generated-by: LLM
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…ckouts Generated-by: LLM
…ures Generated-by: LLM
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…mesa Generated-by: LLM
GCC 16.1.1 on AArch64 at -O3 miscompiled a format-list chain followed by external-memory image creation. Copy the typed payload as well as the chain header, keeping external/shared images uncompressed. Validation: existing policy suite, 3035 checks each, passes GCC -O0/-O2/-O3 on AArch64 16.1.1 and x86_64 16.2.1. No GPU or firmware qualification is claimed. Generated-by: LLM
…ts only The comparison clamps the border depth to [0, 1] for a fixed-point depth format and uses it unclamped for a floating-point one. Commit "asahi: clamp the border depth of a comparing sampler" clamped it for Z32F too. That is against the spec and no longer changes any result: the border_clamp depth_compare_mode iterations it targeted pass without it on J514S. Keep the clamp for fixed-point depth only. Z24 is still clamped by fixup_border_zs() before its promotion to Z32F. Signed-off-by: Eryk Wieliczko <eryk@wieliczko.ninja> (cherry picked from commit d593cfb)
Import Eryk’s current fixed-point border-depth correction
Adapt official Mesa MR44931 into the current device-owned initialization callback. Keep allocation/map failure handling, one-time initialization and shader-stage warm-up intact. The default stays 128 MiB; applications can select 16..1024 MiB with hk_geometry_heap_size_mb. No game override or new hardware/performance qualification is implied by this source change. Source: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/44931 Upstream-commit: a2a5472089a029c067a2e3e35adc420643603065 Generated-by: LLM
Exercise actual initialization for all range boundaries and the default/override sizes, plus BO and map failure cleanup under ASan/UBSan. Keep this host-only regression in the existing public CPU workflow. Generated-by: LLM
Pin the public upstream import, actual checked source tree, fresh driver build and all 36 Asahi test results. Document the retained 128 MiB default, explicit application override and absence of hardware qualification. Generated-by: LLM
…ironment Only promote an ARM staging archive after both architectures and the required gate pass. Preserve symlinks and modes, pin the linter source, make caches optional and PR-only, and install split Wayland/libclc development/runtime dependencies explicitly. Generated-by: LLM
Refuse a staging manifest if essential suites disappear or are skipped, and exercise those failure cases. Generated-by: LLM
Meson default builds omit build_by_default:false test dependencies. Build all registered test dependencies explicitly before running the full suite, preserve useful PR compiler caches after test failures, verify a prebuilt linter instead of compiling it, and sparsely check out control scripts. Cover both signed and unsigned float-to-int64 paths. Generated-by: LLM
chriskearney
changed the title
Drop the redundant x86_64 driver build. Keep every ARM64 test, the required aggregate gate and attested staging path. Generated-by: LLM
Keep x86_64 and native ARM64 driver builds. x86 Mesa libraries are relevant to game userspace, so both targets retain full compiler/test coverage. Generated-by: LLM
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Joshua's agent — rechecked corrected adaptation The separate source trial passed all 138 configured tests on native ARM64 and x86_64. Full signed/unsigned float-to-int64 and perspective-offset interpolation pipelines compiled under Vulkan validation on G13G, G15S, G15C, G17P and G15G. A same-head cache rerun passed again. These were CPU/compiler and drm-shim checks, with zero GPU submissions. They do not establish runtime shader correctness or CTS results. The corrected adaptation remains separate from this PR's source head; the changes added here today are CI only. |
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The corrected late-division pass at
The extraction also references Prepared a test-only repair: positive binary32 ULPs computed without overflowing at FLT_MAX, explicit non-finite-result rejection, seven passing CPU controls, and unchanged public shader/runner fixtures from Joshua’s Generated-by: LLM |
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Bounded real-GPU follow-up for corrected source Each run checks 328,192 input pairs for division and reciprocal: 262,144 seeded/special inputs plus 66,048 normal-boundary inputs. Both installed control (
Candidate division and reciprocal match the reference bitwise across this input set on all three; the installed reciprocal also stays within the bound. No kernel messages appeared during these short runs. Package inventories and boot IDs were unchanged, and the installed driver was retained. Temporary M1/M1 Air test leases were released. Exact source, package/library hashes, harness provenance and per-machine results. This is default-path division/reciprocal coverage, not full CTS, exhaustive math, other float-control modes, sin/cos/log numerical checks, desktop qualification or a performance claim. M3 Air/Max and Neo were not available for this test. The corrected adaptation remains a separate review candidate; this comment changes neither #12’s source head nor the package pin. Generated-by: LLM |
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Checked the test-only follow-up
Both reproduced directly from the new public function without a GPU. The earlier test-only repair already rejects non-finite results explicitly and derives the positive binary32 ULP exponent in binary64 without overflowing at FLT_MAX. Its seven CPU controls include these cases. The actual-GPU table above used that repaired checker, so these remaining defects in the other script do not change the recorded results. No production compiler change is needed for this follow-up. Generated-by: LLM |
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The correctness-only candidate is slower in the matched M1 Quake comparison. This tests source Same boot/kernel on each machine, stock vkQuake executable
No GPU fault was observed during these runs. Neither machine rebooted or had its installed driver replaced; package inventories were unchanged and both leases are released. Exact samples, sources, driver/executable/asset hashes and settings. This is a comparison of the built artifacts, not a commit bisect: the candidate’s bootstrap shader tools used LLVM23 while the earlier package used LLVM22. We have not isolated the source change or build difference responsible, and this short timedemo does not establish broad or sustained game performance. The candidate’s numerical division/reciprocal improvement remains valid; it should not be described as an M1 FPS gain. These results warrant investigation before promoting this candidate into the shipping package. #12’s source head and the package pin remain unchanged. Generated-by: LLM |
 [High impact] The PR changes Mesa’s Apple GPU driver behavior across several device families and adds repository-wide build gates. Fix the Intel shim build failure before merging. Findings
SummaryAdds native M3 Air support, retained G15 packet conversion, placed-map protections, configurable geometry heaps and hosted validation for both CPU architectures.
Acknowledged scope, not additional findings:
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Approving 441699c for integration/aurora. Fresh CI against the new base passed: https://github.com/omacom/mesa/actions/runs/40166601500 (441699c merged into 4911479).
The driver delta is approved. The G15 wire converter checks extents and output capacity and frees its storage on every path, the geometry heap clamps before the multiply, the pNext copies keep the existing policy, and M4 is still refused. The driver code is identical to the hardware-tested 97a65d8; the only source change since then is a comment in agx_chip.c. I also reviewed the CI: read-only PR tokens, full-SHA pins, and OIDC only in the push job.
I'll open a follow-up for the repo identity files right after merge:
- AGENTS.md says this is iconidentify's personal fork. It will become an Omacom policy, with CLAUDE.md, GEMINI.md and Copilot linking to it.
- .github/copilot-instructions.md links to .github/AGENTS.md, which doesn't exist.
- .github/aurora/ is orphaned now that its workflow is gone.
- README.md and MAINTAINING.md describe siliconforest/next. They'll be rewritten for omacom/mesa, with the SILICONFOREST-* evidence files kept as provenance.
Branch protection for integration/aurora is still waiting on an admin.
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Greptile's outside-diff P2 (the .github/copilot-instructions.md symlink resolving to the missing .github/AGENTS.md) is fixed in #13: it now points to ../AGENTS.md. |
Pin 147a62f, integration/aurora after omacom/mesa#12 and omacom#13. Its driver code matches the hardware-tested 97a65d8; omacom#13 changed only docs and the Intel noop shim, which this package doesn't build. Use a new mesa-omacom cache name for the new origin.
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We ran Marcelo's hardware list for the M3 Air path on a J613 (13" M3 Air, encrypted install), against the system mesa-aurora and vulkan-aurora built from omacom/mesa 97a65d8, the source this PR imported. omacom/omarchy-pkgs#1591 will ship 7c86130, which is that plus #15. Setup:
Not covered: tessellation and geometry, queries, sparse and indirect paths, CTS, Hyprland on this Mesa, the 15" J615, and clocks above the default cap (618 MHz). This was the package build, so assertions were off. We haven't done the debug-build screen Marcelo asked for. |
* mesa-aurora: pin the tested SiliconForest integration temporarily Keep the existing mesa-aurora/vulkan-aurora split and LLVM-free runtime build. Use the exact three-Mac tested source, remove the sampler-bias test patch already present in that tree, and isolate the new Git source cache from the existing Aurora clone. The source has boot/readback and matched Quake evidence on J293, J313 and J516S. The package build is being qualified separately; revised-layout M3 Air and full CTS qualification remain pending. Generated-by: LLM * mesa-aurora: build from omacom/mesa integration/aurora Pin 147a62f, integration/aurora after omacom/mesa#12 and #13. Its driver code matches the hardware-tested 97a65d8; #13 changed only docs and the Intel noop shim, which this package doesn't build. Use a new mesa-omacom cache name for the new origin. * mesa-aurora: pin RC source with monotonic snapshot versions --------- Co-authored-by: Marcelo Alcantara <maralc@gmail.com>
This source import brings pinned Aurora native Apple GPU work and Scott Jones’s M3 Air support into Omacom, preserving contributor history. It also adds hosted x86_64/aarch64 PR validation, a required aggregate check and attested ARM staging builds. Omacom is the source destination; personal-fork links below document provenance and CI trials.
Integration target: This draft now targets
integration/aurora, established at the reviewed Aurora base4911479bf988ce88ec0889ed0378352a0bb0fae2. Stockmainremains intact. Newer Aurora WIP commits remain separate review work; this PR does not include every subsequent upstream change. No package is repinned by retargeting.The current stock head
7cda7850edd103ace21aac37d416d2fdf7a282e1is an ancestor of this source. The broad import includes the intervening Mesa base refresh and Aurora native GPU work; it is not a small set of new downstream M3 fixes. This is a source migration, not a small driver patch; keeping merge history preserves attribution.The source was prepared and host-checked in SiliconForest Mesa #3. Historical provenance tags remain available in that public source repository. The optional
--check-gitinventory check requires fetching those exact manifest tags and compatibility refs; the normal CPU CI check does not require them. Personal-fork documentation is retained as source provenance and will need project-owned links/policy before shipping from Omacom.Existing Omacom Mesa proposals remain separate review work. The import includes the NULL transform-feedback fix and selected placed-map protections while retaining independent imported mappings; it does not claim every proposal in #3–#11 is incorporated or superseded. The older M3 foundation proposal #7 needs reconciliation against this newer native integration.
The source fork was still pinned to its October 18 integration, missing later native AGX3 fixes and Scott Jones’s M3 Air path. This merges pinned Aurora WIP and Scott’s draft Air series while retaining downstream mapping ownership, geometry-heap bounds and kernel-contract checks.
aurora-wip:4911479bf988ce88ec0889ed0378352a0bb0fae2.0163e7fa96f4c54f2fb72e6053b2aaa22446a44d, with original commits/authors preserved.7b969982306e1498a8cbe6e5da9bde743acd8fc5. The follow-up converts that exact G15S/G15C contract at the DRM boundary; canonical header equality alone does not qualify the backend. See the source and controls.The integration caught GCC’s optimized nested-pNext compression rejection regression; untyped header/payload copies preserve the existing policy. Host fixtures now follow Air wide-barrier support and held M4 device admission. The image-store compiler fixture compares the image-write packet and independently checks its type bit, rather than requiring unrelated chip schedules to produce identical whole programs. A deliberate float-as-integer compiler mutation fails that check; no production compiler code was changed.
PR validation and staged builds
The CI replaces the standalone-fixtures-only workflow with a single
ci / resultgate. Every PR runs CPU fixtures, pinned kernel UAPI checks and CI-control regressions. Source or CI changes build both hosted architectures with matching shader tools, run all configured Meson tests and Vulkan validation probes, then verify staged ELF dependencies and file hashes. A narrow docs allowlist skips the builds; failures, cancellations and unexpected skips block the aggregate check. Merge queues use the same workflow.PR jobs have a read-only token, no secrets or lab access, SHA-pinned actions and optional PR-scoped compiler caches. Clean integration pushes produce an ARM staging archive only after both builds and the gate pass; a separate job verifies and attests it. These assertion-enabled builds are not Arch packages or hardware/CTS qualification.
Personal-fork validation: CI trial #7, deliberate failure #8, docs-only #9, and a clean staging/attestation run. Both architectures passed 138 configured tests in the clean trial. A same-head cache rerun passed again: build/test took 92 seconds on ARM64 and 118 seconds on x86_64 (total jobs 2m46s and 3m23s). The x86 build covers the x86 Mesa userspace libraries used by games. The downloaded ARM archive’s provenance, exact source ref/commit, 68 file/symlink entries and eight ARM64 ELF payloads were independently verified. The failure control is BLOCKED; the docs control passes without pending build checks.
Maintainers must establish the integration branch, approve fork Actions if required, and require
ci / resultfrom GitHub Actions (app ID 15368), with review of the latest push. No CODEOWNERS or Omacom repository settings were changed. See CI rollout and trust boundaries.Validation
Current production source:
97a65d845f39418aecc693dcaf9dcb14a05849f6. It adds the retained G15 wire converter after the initial integration’s ABI refusal. The earlierSILICONFOREST-VALIDATION.jsonrecords the preceding integration; the follow-up and current qualification scope are documented separately.0and1. Held M4 refusal also passes. Khronos validation reports zero errors; zero GPU submissions.Hardware results and remaining qualification
Tested production source:
97a65d845f39418aecc693dcaf9dcb14a05849f6; the later qualification commit changes documentation and one comment only. The common ARM64 build passed 92/92 Asahi tests; both M1 package variants preserve all seven ELF payloads byte for byte and change only profile/runtime-owner metadata.All three available Macs passed installed-Mesa reboot, compositor/display and independent GL ES/Vulkan pixel checks, with zero wrong-pixel loops and no GPU/DART faults observed during these runs. Matched 1920×1080 Quake medians, three runs each:
7.2.11-mixtape-77648eb77168-g157.2.11-lab182-205f5e8b20fc-normal7.2.11-lab182-205f5e8b20fc-normalThe M3’s fresh pre-upgrade baseline was 152.0 FPS on the same kernel. This is an observed roughly 21.5% improvement across the upgrade/reboot, not a sustained-performance or isolated-cause claim. The gap to M1 remains. The initial J293 57 FPS session also stayed slow with an isolated new Vulkan driver and recovered after reboot; do not attribute that to a ninefold Mesa improvement.
The first J516S attempt caught the retained G15
0x3ewire before VM creation. The follow-up translates both feature assignments and complete packet layouts; it does not bypass admission or change kernel bits. It then also passed readbacks and measured 185.8 FPS on the newer7b969982306eone-shot kernel. The full normal lab job remains TESTS_FAILED, with OMT 0.1.13 flagging its single-driver-path detection and literal package-name checks against the old 7.1.12 reference. Other OMT GPU-reporting discrepancies remain recorded; this is not a full-lab PASS. No protection was bypassed or historical baseline rewritten.The new Mesa is installed on all three; their original default kernels and protected boot files are preserved. Exact samples, build/package/library hashes, source evidence and limitations: hardware receipt. The source/overlap map is in this coordination note.
This remains a draft source candidate. Scott’s J613 report now covers source
97a65d845f3built locally from the split-package recipe: native desktop without opt-in variables, texture/MSAA/compute readbacks, and a short 89.7 FPS median on his locally built vkQuake. These are his reported hardware results, not an independent lab run or a matched speedup claim. His test used the retainedm3aircamkernel. The legacymesa-m3software-fallback hook remains a packaging migration issue to resolve before an Air release. J615, T8122 HAL200, full CTS and sustained stability remain unqualified. Kernel/package/installer defaults are separate work. The required CI/review branch settings and the normal maintainer release decision remain separate work.Generated-by: LLM